The present invention relates generally to the field of data communications, and more particularly, to the field of serial communications bus controllers and microcontrollers that incorporate the same.
CAN (Control Area Network) is an industry-standard, two-wire serial communications bus that is widely used in automotive and industrial control applications, as well as in medical devices, avionics, office automation equipment, consumer appliances, and many other products and applications. CAN controllers are currently available either as stand-alone devices adapted to interface with a microcontroller or as circuitry integrated into or modules embedded in a microcontroller chip. Since 1986, CAN users (software programmers) have developed numerous high-level CAN Application Layers (CALs) which extend the capabilities of the CAN while employing the CAN physical layer and the CAN frame format, and adhering to the CAN specification. CALs have heretofore been implemented primarily in software, with very little hardware CAL support. Consequently, CALs have heretofore required a great deal of host CPU intervention, thereby increasing the processing overhead and diminishing the performance of the host CPU.
Thus, there is a need in the art for a CAN hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU to the CAN hardware, thereby enabling a great savings in host CPU processing resources and a commensurate improvement in host CPU performance. One of the most demanding and CPU resource-intensive CAL functions is message management, which entails the handling, storage, and processing of incoming CAL/CAN messages received over the CAN serial communications bus and/or outgoing CAL/CAN messages transmitted over the CAN serial communications bus. CAL protocols, such as DeviceNet, CANopen, and OSEK, deliver long messages distributed over many CAN frames, which methodology is sometimes referred to as xe2x80x9cfragmentedxe2x80x9d or xe2x80x9csegmentedxe2x80x9d messaging. The process of assembling such fragmented, multi-frame messages has heretofore required a great deal of host CPU intervention. In particular, CAL software running on the host CPU actively monitors and manages the buffering and processing of the message data, in order to facilitate the assembly of the message fragments or segments into complete messages.
Based on the above and foregoing, it can be appreciated that there presently exists a need in the art for a hardware implementation of CAL functions normally implemented in software in order to offload these tasks from the host CPU, thereby enabling a great savings in host CPU processing resources and a commensurate improvement in host CPU performance.
The assignee of the present invention has recently developed a new microcontroller product, designated xe2x80x9cXA-C3xe2x80x9d, that fulfills this need in the art. The XA-C3 is the newest member of the Philips XA (eXtended Architecture) family of high performance 16-bit single-chip microcontrollers. It is believed that the XA-C3 is the first chip that features hardware CAL support.
The XA-C3 is a CMOS 16-bit CAL/CAN 2.0B microcontroller that incorporates a number of different inventions, including the present invention. These inventions include novel techniques and hardware for filtering, buffering, handling, and processing CAL/CAN messages, including the automatic assembly of multi-frame fragmented messages with minimal CPU intervention, as well as for managing the storage and retrieval of the message data, and the memory resources utilized therefor. In particular, the XA-C3 CAN module has the unique ability to track and reassemble the packets constituting a fragmented message, completely in hardware, only interrupting the CPU (processor core) once a complete, multi-frame message is received and assembled. This tremendously reduces the processor bandwidth required for message handling, thereby significantly increasing available bandwidth for other tasks, so that system performance is greatly enhanced.
The present invention relates to a scheme employed by the XA-C3 microcontroller to handle a message buffer full condition in such a manner that ensures no loss of data, while minimizing the required processor intervention. More particularly, the present invention relates to a particular implementation of this scheme, including specific techniques for detecting the message buffer full condition and for determining the number of data bytes stored in a message buffer.
The present invention encompasses A CAN microcontroller that supports a plurality of message objects, and that includes a processor core that runs CAN applications, a plurality of message buffers associated with respective ones of the message objects, a CAN/CAL module that processes incoming messages that include a plurality of frames, each frame having a maximum number n of data bytes, and a plurality of message object registers associated with each of the message objects, including at least one buffer size register that contains a message buffer size value that specifies the size of the message buffer associated with that message object, and at least one buffer location register that contains an address pointer that points to an address of the storage location in the message buffer associated with that message object where the next data byte of the current incoming message is to be stored.
The CAN/CAL module includes a message handling function that transfers successive frames of the current incoming message to the message buffer associated with a selected one of the message objects designated as a receive message object for the current incoming message an address pointer increment function that, in response to a transfer of the current data byte to the message buffer associated with the designated receive message object, increments the address pointer to the address of the storage location in that message buffer where the next data byte of the current incoming message is to be stored.
The CAN/CAL module further includes a frame status detection function that detects whether or not the current frame of the current incoming message is the final frame of the current incoming message. The CAN/CAL module also includes a buffer-status detection function that, each time that the address pointer is incremented, retrieves the incremented address pointer value, retrieves the message buffer size value from the at least one buffer size register associated with the designated receive message object, and decodes the retrieved message buffer size value into a buffer-size mask comprised of a plurality x of bits, where x is equal to a prescribed number of allowable buffer sizes, and wherein y bits of the buffer-size mask have a first logic state and the remaining x-y bits have a second logic state, where 2y equals the retrieved message buffer size value, in terms of number of bytes; and, determines a message buffer-fullness status of the message buffer associated with the designated receive message object using the retrieved incremented address pointer value and the message buffer-size mask.
In a present implementation, the buffer-status detection function determines a first buffer-fullness state of the message buffer associated with the designated receive message object by logically OR""ing each of the x LSBs of the retrieved incremented address pointer value with a corresponding bit of the buffer-size mask, to thereby produce x OR results, and then logically AND""ing the x OR results, to thereby produce a first single-bit AND result, where the first logic state is xe2x80x980xe2x80x99 and the second logic state is xe2x80x981xe2x80x99. A xe2x80x981xe2x80x99 value of the first single-bit AND result corresponds to the first buffer-fullness state of the message buffer associated with the designated receive message object.
Also, in the present implementation, the buffer-status detection function determines a second buffer-fullness state of the message buffer associated with the designated receive message object by determining whether the number of available bytes of remaining storage capacity in the message buffer associated with the designated receive message object is less than the maximum number n of data bytes, using the retrieved incremented address pointer value and the message buffer-size mask.
Additionally, in the present implementation, the buffer-status detection function determines the second buffer-fullness state of the message buffer associated with the designated receive message object by logically AND""ing the first z ones of the x OR results to produce a second single-bit AND result, where 2x-z=n. A xe2x80x981xe2x80x99 value of the second single-bit AND result corresponds to the second buffer-fullness state of the message buffer associated with the designated receive message object. Preferably, the buffer-status detection function declares a message buffer-full condition if the value of the second single-bit AND result is xe2x80x981xe2x80x99, and the current frame of the current incoming message is not the final frame of the current incoming message.
The CAN/CAL module preferably further includes a current byte count computation function that determines the current byte count by logically AND""ing each of the x LSBs of the retrieved incremented address pointer value with the inverse of the corresponding bit of the buffer-size mask, and an address pointer reset function that logically ANDs each of the x LSBs of the retrieved incremented address pointer value with the corresponding bit of the buffer-size mask, and writes the resultant value back into the at least one buffer location register associated with the designated receive message object.
The CAN/CAL module further includes a message buffer-full interrupt generator function that generates a message buffer-full interrupt to the processor core in response to a declaration of a message buffer-full condition.
In the presently preferred embodiment, the frame status detection function detects whether the current frame of the current incoming message is the final frame of the current incoming message by deriving that information from the header portion of the current frame of the current incoming message.
In the presently preferred embodiment, the CAN/CAL module further includes a message-complete interrupt generator function that generates a message-complete interrupt to the processor core in response to the frame status detection function detecting that the current frame of the current incoming message is the final frame of the current incoming message.
Preferably, the size of each message buffer can be selected by the user by programming a selected message buffer size value into the at least one message buffer size register associated with that message buffer, and the base address of each message buffer can be selected by the user by programming the address pointer associated with that message buffer to point to a selected base address.
In the presently preferred embodiment, the message buffer-full interrupt generator function determines a current byte count that indicates the number of data bytes of the current incoming message that have already been stored in the message buffer associated with the designated receive message object, resets the address pointer contained in the at least one buffer location register associated with the designated receive message object to the base address, writes the current byte count into the message buffer associated with the designated receive message object, in the storage location corresponding to the base address, and generates a message buffer-full interrupt.
Preferably, the current CAN application running on the processor core is provided with two options as to how to respond to the message buffer-full interrupt. Under the first option, in response to the message buffer-full interrupt, the current CAN application reads the entire contents of the designated receive message buffer, and then transfers the read-out entire contents to another storage location in the data memory space, thereby freeing up the designated receive message buffer to store the at least one remaining frame of the current incoming message. Under the second option, the current CAN application, in response to the message buffer-full interrupt, modifies the base address of the designated receive message buffer by replacing the current base address with a new base address, whereby the designated receive message buffer consists of a first buffer portion starting with the current base address, and a second buffer portion starting with the new base address.
Preferably, the current CAN application, in response to the message-complete interrupt, retrieves a first number of the data bytes of the current incoming message from the first buffer portion, and retrieves a second number of the data bytes of the current incoming message from the second buffer portion, where the first number is the current byte count.